1. Field of the Invention
The present invention relates to semiconductor devices and their methods of fabrication. More particularly, the present invention relates to the formation of gate stacks. Even more particularly, the present invention relates to forming a gate stack having a metal oxide high dielectric constant gate insulator with superior thermal stability and reduced diffusion into silicon-bearing semiconductor structures.
2. Description of the Background Art
Currently, the semiconductor industry has an interest in reducing the critical dimensions of transistors. As such, the thickness of the gate oxide must also be reduced. In so doing, the related art has faced problems associated with a significant increase in direct tunneling leakage current through a very thin gate oxide (i.e.,  less than 25 Angstroms). In an effort to suppress the severe gate leakage current, a high dielectric constant (high-k) material may be used as a gate dielectric, replacing a conventional thermal oxide. Several high-k materials (metal oxides) are good candidates for gate dielectric insulators: zirconia or zirconium dioxide (ZrO2), hafnia or hafnium dioxide (HfO2), titania or titanium dioxide (TiO2), tantala or tantalum pentoxide (Ta2O5), and the like.
However, a high-k gate dielectric insulator, such as the foregoing metal oxides, must have a thickness which is much greater than that of a conventional thermal oxide to be similarly effective, because the direct current density is exponentially proportional to a dielectric layer""s thickness. Thus, the direct tunneling current flow through a gate dielectric insulator may be significantly reduced, motivating its use in very small transistors. Another major problem with using a high-k material is thermal instability. High-k materials tend to diffuse into the silicon (Si) substrate, a polysilicon (poly-Si) gate, or a polysilicon-germanium (poly-SiGe) gate during subsequent high temperature processing steps. Therefore, a need exists for a method of fabricating a semiconductor device having a locally-formed metal oxide high-k gate insulator with superior thermal stability which does not diffuse into the Si substrate, a poly-Si gate, or a poly-SiGe gate during subsequent high temperature processing steps.
Accordingly, the present invention provides a method of fabricating a semiconductor device having a locally-formed metal oxide high-k gate insulator, and a device thereby formed. Generally, the present invention device comprises a metal oxide high-k gate insulator (i.e., a nitride/high-k material gate dielectric stack), wherein the nitride layer may be formed by a technique such as annealing in a gaseous nitrogen (N2) ambient. The present invention method for fabricating the present device, generally comprises: nitriding a silicon substrate, thereby forming a thin silicon nitride (Si3Ny, wherein yxe2x89xa74, i.e., nitrogen-rich) layer on the substrate, wherein the nitrogen-rich surface provides superior resistance to metal diffusion into the substrate; depositing a thin metal film on the nitride layer; depositing a thick nitride film, such as silicon nitride (Si3N4); patterning the thick Si3N4 film, thereby exposing at least one portion of the thin metal film; and selectively forming a metal oxide layer by locally oxidizing the at least one exposed portion of the thin metal film, wherein the selective metal oxide layer forming step is performed by local laser irradiation, whereby the at least one thin metal film exposed portion is selectively heated for inducing reaction between the metal ions of the film and oxygen ions from the environment. This present invention device, so formed, has the advantages of providing sufficient diffusion resistance as well as thermal stability in a thin (i.e., small) feature size.
By way of example, and not of limitation, a semiconductor device having a locally-formed metal oxide high-k gate insulator with good thermal stability which does not diffuse into a Si substrate, a poly-Si gate, or a poly-SiGe gate when experiencing subsequent high temperature processes, may be fabricated according to the present invention by: (a) providing a substrate; (b) nitriding the substrate, thereby forming a thin silicon nitride (e.g., Si3Ny, where yxe2x89xa74) layer on the substrate; (c) depositing a high-k material, which may comprise a thin metal film, on the thin silicon nitride layer; (d) forming a localized metal oxide layer from the thin metal film, wherein the step (d) comprises (d)(1) depositing a thick Si3N4 layer on the high-k material, (d)(2) patterning the thick Si3N4 layer, thereby covering at least one portion of the thin metal film, thereby exposing at least one portion of the thin metal film, and thereby forming an electrode cavity, (d)(3) locally oxidizing, by heating, the at least one exposed thin metal film portion for inducing reaction between the metal ions of the at least one portion and oxygen ions from the environment, thereby forming the localized metal oxide layer, wherein the oxidizing is performed by local laser irradiation; (e) forming a gate stack comprising the localized metal oxide layer, wherein the step (e) may comprise (e)(1) depositing a thick gate material in the electrode cavity and on the localized metal oxide layer, wherein the thick gate material may comprise a material selected from a group consisting essentially of polysilicon poly-Si and poly-SiGe;(e)(2) polishing the thick gate material to a level which is flush to an upper surface of the thick Si3N4 layer, whereby the thick Si3N4 layer acts as a polish-stop, thereby forming a gate electrode; and (e)(3) removing the thick Si3N4 layer along with the at least one covered thin metal film portion, thereby forming the gate stack; and (f) completing fabrication of the semiconductor device, wherein step (f) may comprise the forming of a MOSFET structure comprising the stack.
Advantages of the present invention include suppressing severe gate leakage current and providing a locally-formed metal oxide high-k gate insulator with superior thermal stability which does not diffuse into the Si substrate, a poly-Si gate, or a poly-SiGe gate during subsequent high temperature processing steps. Further advantages of the invention will be explicated in the following portions of the specification, wherein the detailed description is for the purpose of fully disclosing preferred embodiments of the invention without thereon placing limitations.